shift register 【自動化】移位寄存器。
【自動化】移位寄存器。 “shift“ 中文翻譯： vt. 1.變動；改變；搬移；移動；轉移；變換；替換；更 ...“register“ 中文翻譯： n. 1.記錄，注冊，登記，掛號。 2.(人口動態，戶籍 ...“register, shift“ 中文翻譯： 位移寄存器“analog shift register“ 中文翻譯： 模擬移位寄存器“analogue shift register“ 中文翻譯： 模擬移位寄存器“asynchronous shift register“ 中文翻譯： 異步移位寄存器“autonomous shift register circuit“ 中文翻譯： 自激移位寄存器電路“bidirectional shift register“ 中文翻譯： 雙向移位寄存器“bipolar shift register“ 中文翻譯： 雙極型移位寄存器; 雙極移位寄存器“bit shift register“ 中文翻譯： 移位寄存器“bubble shift register“ 中文翻譯： 磁泡移位寄存器“bubble-domain shift register“ 中文翻譯： 泡疇移位寄存器“bucket brigade shift register“ 中文翻譯： 斗鏈式移位寄存器“bucket-brigade shift register“ 中文翻譯： 組桶式移位寄存器“ccd shift register“ 中文翻譯： 電荷耦合器件移位寄存器; 電荷耦合移位寄存器“clock shift register“ 中文翻譯： 時鐘移位寄存器“closed loop shift register“ 中文翻譯： 閉環移位寄存器“counter shift register“ 中文翻譯： 計數器移位寄存器“csr circulating shift register“ 中文翻譯： 循環轉換寄存器“decoding shift register“ 中文翻譯： 譯碼移寄存器; 譯碼移位寄存器“dual shift register“ 中文翻譯： 對偶移位寄位器“dynamic mos shift register“ 中文翻譯： 動態金氧半導體移位寄存器“dynamic shift register“ 中文翻譯： 動態位程暫存器; 動態移位寄存器“dynamic shift register cell“ 中文翻譯： 動態移位寄存器單元“encoding shift register“ 中文翻譯： 編碼移位寄存器
shifter |
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In this paper , we discuss a kind of filter generator whose filter functions have less input bits than the degree of the linear feedback shift register ( lfsr ) . by analyzing the structure of the filter generator and its equivalent system , we give out a conditional search algorithm ( csa ) to attack this kind of filter generators 針對濾波函數f ( x )的輸入比特數m少于線性反饋移位寄存器級數n的濾波生成器,本文通過分析其等價的組合生成器的結構,以及不同節拍上驅動序列的各個符號之間的制約關系,給出了廣義解序列的概念,并提出了類似遍歷二叉樹的條件搜索算法csa ,用于攻擊該類特殊的濾波序列。 |
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This paper presents an architecture based - on shift register array , which can be used for the search for the two search pattern simultaneously . this architecture was inspired by the vlsi architecture for diamond - search - pattern - based algorithms . it exploits the overlap of reference data among the search points to reduce data memory accesses which are the most power consuming operations 其基本思想是利用搜索點之間的參考數據重疊的特征,把需要用于多個搜索點計算的參考數據存儲在移位寄存器陣列中,通過移位操作來滿足不同搜索點的計算需要,大大降低了數據存儲器訪問次數,從而減少了運動估計中功率消耗最大部分的操作。 |
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Calculation for the data resulted from simulation shows that power dissipation of det shift register can be reduced evidently because of using the clock with half working frequency , in comparison with its counterpart set shift register 對模擬所得數據的計算結果表明，與實現相同功能的單邊沿移位寄存器相比，由于工作頻率減半，雙邊沿移位寄存器的功耗有明顯降低。 |
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Calculation for the data from simulation shows that power dissipation of det shift register can be reduced evidently because of using the clock with half working frequency , in comparison with its counterpart set shift register 對模擬所得數據的計算結果表明，與實現相同功能的單邊沿移位寄存器相比，由于工作頻率減半，雙邊沿移位寄存器的功耗有明顯降低。 |
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In order to run the row transform and column transform simultaneously , a row transform buffer is placed between the row transform and the column transform . it ’ s implemented in shift register form and easy to control 為了實現行變換和列變換的并行進行在二者之間加入了一個行緩存模塊,它采用移存器來實現,控制簡單。 |
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Pmosfets and two 16 - bits shift registers were used as the impedance converting and address selection of the elements respectively . the thermal insulation layer was a polyimide film of five micrometers an 用pmos場效應管作熱釋電元件的阻抗轉換，用雙16位移位寄存器作敏感元件信號讀出的選址。 |
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Secondly , we prove the self - relation function and correlation function of pseudo noise code sequence and obtain the shift register generating circuit from it ' s generating function 然后，通過偽碼的生成多項式，導出偽碼的移位寄存器生成電路，并分析了偽碼的自相關特性和互相關特性。 |
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Controlling system is composed of drive circuit , locking memory , shift register . temperature compensating circuit and drive power circuit are also needed 控制系統是由驅動電路、鎖存器、移位寄存器等組成，此外還需要溫度補償電路和驅動電源電路，本文對控制系統進行了詳細的論述。 |
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Fcsr sequences are the abbreviation for feedback with carry shift register sequences . among these , the most important are maximum - period fcsr sequences , that is , l - sequences 帶進位反饋移位寄存器序列簡稱fcsr序列，其中最重要的是極大周期fcsr序列，即l -序列 |
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Then , we propose a design method named det ( double - edge - triggered ) shift register to eliminate the bootless power dissipation of the redundant transition of the clock 接著，從消除時鐘信號冗余跳變而致的無效功耗的要求出發，提出雙邊沿移位寄存器的設計思想。 |
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Meanwhile , the implementation of such block cipher as rijndael with shifting registers is designed with performance as good as that of he method of table - lookup 將移位寄存器實現高效流密碼的思想用于分組密碼rijndael算法的實現，獲得與查表法相當的效率。 |
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To eliminate the bootless power dissipation of the redundant transition of the clock , a design method named det ( double - edge - triggered ) shift register is proposed 摘要從消除時鐘信號冗馀跳變而致的無效功耗的要求出發，提出雙邊沿移位寄存器的設計思想。 |
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Detail specification for electronic components . semiconductor integrated circuit ct54195 ct74195 4 - bit parallel - access shift register 電子元器件詳細規范.半導體集成電路ct54195 ct74195型4位移位寄存器并行存取， j - k輸入 |
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Detail specification for electronic components . semiconductor integrated circuit ct54ls195 ct74ls195 4 - bit parallel - access shift register 電子元器件詳細規范.半導體集成電路ct54ls195 ct74ls195型4位移位寄存器并行存取 |
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For example , if the block size is eight bytes , with one byte processed at a time , the shift register is divided into eight sections 例如，如果塊大小為8個字節，并且每次處理一個字節，則移位寄存器被分為8個部分。 |
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This results in the next several plain text increments being mangled until the bad bit is shifted out of the shift register 這將導致接下來若干次遞增的純文本出錯，直到出錯位從移位寄存器中移出為止。 |
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Detail specification for electronic component . semiconductor integrated circuit - cc4014 cmos 8 - bit shift register 電子元器件詳細規范.半導體集成電路cc4014型cmos8位移位寄存器 |
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In an mos dynamic shift register the above problem is solved by keeping data in continuous motion Mos動態移位寄存器的上述問題是通過使輸入數據連續不斷地循環來解決的。 |
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Detail specification for electronic component . semiconductor integrated circuit . type ch2022 4 - bit shift register 電子元器件詳細規范.半導體集成電路ch2022型4位移位寄存器 |